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| HD74AC165/HD74ACT165 Parallel-Load 8-bit Shift Register Description This 8-bit serial shift register shifts data from Q A to QH when clocked, Parallel inputs to each stage are enabled by a low level at the Shift/Load Input. Also included is a gated clock input and a complementary output from the eighth bit. Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit function. Holding either of the clock inputs high inhibits clocking, and holding either clock input low with the Shift/Load input high enables the other clock input. Data transfer occurs on the positive going edge of the clock. Parallel loading is inhibited as long as the Shift/Load input is high. When taken low, data at the parallel inputs is loaded directly into the register independent of the state of the clock. Features * Outputs Source/Sink 24 mA * HD74ACT165 has TTL-Compatible Inputs HD74AC165/HD74ACT165 Pin Arrangement SL 1 CP 2 E3 Parallel Inputs F4 G5 H6 QH 7 GND 8 (Top view) 16 VCC Clock 15 Inhibit 14 D 13 C 12 B 11 A 10 SI 9 QH Parallel Inputs Logic Symbol 15 11 12 13 14 3 4 5 6 1 2 10 Clock Inhibit SL CP SI A B C D E F GH QH QH 9 7 Pin Names A to H SI CP SL Clock Inhibit QH, QH Parallel Inputs Serial Input Clock Input Shift Load Clock Inhibit Outputs 2 HD74AC165/HD74ACT165 Truth Table Inputs Clock SL L H H H H H: L: X: : Inhibit X L L L H X CP X L SI X X H L X Parallel A ****** H a ****** h X X X X Internal Outputs QA a QAD H L QAD QB b QBO QAn QAn QBO Outputs QH h QHO QGn QCn QHO High Voltage Level Low Voltage Level Immaterial Low-to-High Clock Transition 3 HD74AC165/HD74ACT165 Logic Diagram Parallel Inputs A B C D E F G H Preset QA S Clock QA R Clear Preset QB S Clock QB R Clear Preset QC S Clock QC R Clear Preset QD S Clock QD R Clear Preset QE S Clock QE R Clear Preset QF S Clock QF R Clear Preset QG S Clock QG R Clear Preset QH S Clock QH R Clear Output QH Output QH SI SL CP Clock Inhibit DC Characteristics (unless otherwise specified) Item Maximum quiescent supply current Maximum quiescent supply current Maximum additional ICC/input (HD74ACT165) Symbol I CC I CC I CCT Max 80 8.0 1.5 Unit A A mA Condition VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case VIN = VCC or ground, VCC = 5.5 V, Ta = 25C VIN = VCC - 2.1 V, VCC = 5.5 V, Ta = Worst case 4 HD74AC165/HD74ACT165 AC Characteristics: HD74AC165 Ta = +25C CL = 50 pF Item Maximum count frequency Propagation delay CP to QH or QH Propagation delay CP to QH or QH Propagation delay H to QH or QH Propagation delay H to QH or QH Propagation delay SL to Q H or QH Propagation delay SL to Q H or QH Note: t PHL t PLH t PHL t PLH t PHL t PLH Symbol f max VCC (V)*1 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Min 85 100 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ -- -- 11.0 8.0 12.0 8.5 13.5 9.5 9.0 6.5 11.5 8.5 10.0 7.5 Max -- -- 17.5 11.5 18.0 12.5 19.5 13.5 14.0 9.5 20.5 14.0 16.5 11.0 Ta = -40C to +85C CL = 50 pF Min 70 90 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max -- -- 20.5 13.5 21.5 14.5 22.5 15.5 16.5 11.0 23.5 16.0 19.5 12.5 ns ns ns ns ns ns Unit MHz 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V 5 HD74AC165/HD74ACT165 AC Operating Requirements: HD74AC165 Ta = +25C CL = 50 pF Item Setup time, HIGH or LOW H to SL Hold time, HIGH or LOW H to SL Setup time, HIGH or LOW Sin to CP Hold time, HIGH or LOW Sin to CP Setup time, HIGH or LOW SL to CP Hold time, HIGH or LOW SL to CP Recovery time clock inhibit to CP Clock pulse width tw t rec th t su th t su th Symbol t su VCC (V)*1 Typ 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Note: 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V 3.5 2.5 -1.0 -0.5 1.0 0.5 1.5 1.0 3.0 2.0 -2.0 -1.0 2.5 2.0 3.0 3.0 Ta = -40C to +85C CL = 50 pF Guaranteed Minimum 5.0 4.0 0.5 0.5 3.5 3.0 2.0 2.0 5.0 4.0 0.0 0.0 3.5 3.0 5.5 4.5 6.0 4.5 0.5 0.5 4.0 3.5 2.0 2.0 6.0 4.5 0.0 0.0 3.5 3.0 7.0 5.0 ns ns ns ns ns ns ns Unit ns 6 HD74AC165/HD74ACT165 AC Characteristics: HD74ACT165 Ta = +25C CL = 50 pF Item Maximum count frequency Propagation delay CP to QH or QH Propagation delay CP to QH or QH Propagation delay H to QH or QH Propagation delay H to QH or QH Propagation delay SL to Q H or QH Propagation delay SL to Q H or QH Note: Symbol f max t PLH t PHL t PLH t PHL t PLH t PHL VCC (V)*1 5.0 5.0 5.0 5.0 5.0 5.0 5.0 Min 7.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ -- 8.5 9.5 10.5 7.5 9.5 8.5 Max -- 13.5 14.0 13.5 11.0 15.0 13.0 Ta = -40C to +85C CL = 50 pF Min 60 1.0 1.0 1.0 1.0 1.0 1.0 Max -- 15.5 16.5 15.5 12.5 18.0 15.5 Unit MHz ns ns ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V 7 HD74AC165/HD74ACT165 AC Operating Requirements: HD74ACT165 Ta = +25C CL = 50 pF Item Setup time, HIGH or LOW H to SL Hold time, HIGH or LOW H to SL Setup time, HIGH or LOW Sin to CP Hold time, HIGH or LOW Sin to CP Setup time, HIGH or LOW SL to CP Hold time, HIGH or LOW SL to CP Recovery time clock inhibit to CP Clock pulse width Note: Symbol t su th t su th t su th t rec tw VCC (V)*1 Typ 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 3.0 -1.0 0.5 0.5 2.0 -1.5 2.0 3.5 Ta = -40C to +85C CL = 50 pF Guaranteed Minimum 4.0 0.0 3.0 2.0 4.0 0.0 3.0 7.0 4.5 0.0 3.5 2.0 4.5 0.0 3.0 8.0 Unit ns ns ns ns ns ns ns ns 1. Voltage Range 5.0 is 5.0 V 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Symbol CIN CPD Typ 4.5 5.0 Unit pF pF Condition VCC = 5.5 V VCC = 5.0 V 8 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 0.05 0.20 0.04 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 - 1.15 0 - 8 0.70 0.20 1.27 *0.42 0.08 0.40 0.06 0.12 M Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA -- Conforms 0.24 g *Dimension including the plating thickness Base material dimension 0.10 0.10 0.15 Unit: mm 9.9 10.3 Max 16 9 3.95 1 1.27 0.635 Max 8 0.11 0.14 + 0.04 - 1.75 Max *0.22 0.03 0.20 0.03 0.10 6.10 + 0.30 - 1.08 0 - 8 0.67 0.60 + 0.20 - *0.42 0.08 0.40 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Unit: mm 5.00 5.30 Max 16 9 4.40 1 0.08 *0.22 + 0.07 - 8 0.65 1.0 6.40 0.20 0 - 8 0.50 0.10 0.20 0.06 0.13 M 0.65 Max *0.17 0.05 0.15 0.04 1.10 Max 0.10 0.07 +0.03 -0.04 *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) TTP-16DA -- -- 0.05 g Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 URL NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to: Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan. |
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